Ambarella has announced the expansion of its AI vision SoC portfolio with the new CV5S and CV52S security families used in many CCTV cameras delivering analytics at the edge.

Based on the CVflow architecture and advanced 5nm process technology, the new SoCs support simultaneous 4K encoding and advanced AI processing in a single low-power design, which provides industry-leading edge AI SoC performance per watt.

The CV5S family is designed for security camera applications that require multiple sensors for 360-degree coverage, over a wide area and with a long range, such as outdoor city environments or large buildings. Meanwhile, the CV52S family is designed for single-sensor security cameras with advanced AI performance that need to identify individuals or objects in a scene, including faces and license plate numbers over long distances, such as ITS traffic cameras.

The new CV5S SoC family supports multi-imager camera designs and can simultaneously process and encode 4 imager channels of up to 8MP, or 4K resolution, each at 30 frames per second, while performing advanced AI on each 4K imager. These SoCs double the encoding resolution and memory bandwidth while consuming 30 per cent less power than Ambarella’s prior generation.

The new CV52S SoC family targets single-sensor security cameras and supports 4K resolution at 60fps, while providing 4x the AI computer vision performance, 2x the CPU performance and 50 per cent more memory bandwidth than its predecessors. This increase in neural network (NN) performance enables more AI processing to be performed at the edge, instead of in the cloud.

Additional features include:

* Robust SDK created specifically for the security camera market
* CVflow tools that are compatible across all security families
* Dual Arm A76 1.6GHz CPUs with 1MB of L3 memory; a 2x performance gain over the prior generation for faster customer applications
* Enhanced ISP with excellent HDR, ISO lowlight, dewarping and rotation performance
* On-chip privacy masking to block out a portion of the captured scene
* New PCIe and USB 3.2 interfaces, enabling more complex, multi-chip security system designs than prior generation
* Strong on-chip cybersecurity hardware to ensure secure IP cameras, including secure boot, OTP and Arm TrustZone technology
* Multiple video inputs, with support for up to 14 cameras using MIPI virtual channels
* SLVS-EC interface on the CV5S for reduced system design complexity
* Support for LPDDR4x, LPDDR5 and LPDDR5x DRAM.

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